Become a part of the semify team and contribute to our pioneering digital design services, supporting innovative technologies for a diverse array of customers. We are a young, dynamic company based in Graz, Austria, working on exciting and cutting-edge projects. We are seeking experienced Digital Design and Verification Engineers to join our versatile team.

Tasks

As a Digital Design Engineer at semify, you will play a critical role in implementing and verifying digital designs, developing FPGA-based prototypes, and directly interacting with our industry-leading customers to help them solve their problems. You'll also coordinate teams of engineers, both onsite and remote. You'll be part of a dynamic and growing team that is dedicated to making an impact.

Requirements

The ideal candidate will:

• Have a minimum of 3 years of experience in digital design of ASICs and/or FPGAs
• Have good knowledge of at least one HDL (Hardware Description Language), with System Verilog preferred
• Be able to implement synchronous digital designs for ASICs or FPGAs
• Experience in verifying digital designs (UVM preferred)
• Be able to understand and write Python scripts
• Be experienced in working with version control systems (Git preferred)
• Enjoy working in a distributed team

Benefits

At semify, we believe in providing a flexible work environment that enables our team members to balance their personal and professional commitments.