51437BR

SOUTH KOREA - Yongin-Si

Job Description :

• Responsible for DFT insertion from logic design to post-silicon bring up at the Block/Sub-system level.
• Responsible for inserting DFT logic into Block at the RTL and at the Synthesis gate level.
• Implement and validate DFT logic insertion at the Block/Sub-system level.
• Work closely with RTL design, Implementation and STA teams on DFT gate level insertion and timing closure to improve testability and meet coverage targets.
• Responsible for pre-silicon verification and post-silicon validation related to all aspects of DFT at the Block/Sub-system level.
• Learn and adapt to new and advanced DFT insertion methodology.

Requirements :

• Experience in setting up and implementing MBIST, REPAIR, SCAN, OCC, JTAG at chip and block level
• Experience working in various Block/Sub-system environment for DFT insertion.
• Experience with ATPG and MBIST pattern generation and verification
• Experience pre-silicon verification and post silicon validation at Block/Sub-system level
• Experience in generating test vectors and supporting post-silicon vector setup
• Experience with timing constraints development and analysis for DFT modes and SDF simulations
• Knowledge of physical synthesis, logic equivalence check and static timing analysis at Block/Sub-system level
• Experience with Synopsys and/or Siemens DFT and simulation tools

Bachelors or Masters degree with 3+ years of experience in IC-Design/Semiconductor Engineering or related field

Engineering

Korea, Republic of

SOC Engineering

Employee