Germany Job Openings

NXP Semiconductors

Senior Digital Design Engineer

Hamburg

FULL TIME

September 2, 2024


Ready to join the future of innovation in Digital Design Engineering?

This opening is within the Microprocessor and Microcontroller Engineering (MME) So C Implementation Organization, a central R&D Design group responsible for end-to-end IC/So C implementation of the Automotive and Industrial Automation Processors in NXP.


We are seeking a senior Digital Design Engineer to join our team in Hamburg, Germany. The Hamburg So C integration team develops complete “System on Chip” products in the domain of Radar applications and Radio Infotainment.
International relocation can be accommodated for qualified candidates.


Your Responsibilities:
  • Contributing to micro-architecture, RTL design and integration of a System on Chip (So C) or So C sub-system, from requirements specification to tape-out and beyond.
  • Developing and delivering signed-off verilog RTL and associated deliverables (e.g. clock/reset domain constraints, timing constraints, design documentation).
  • Design modelling and elaboration of abstractions that enable pre-silicon simulations of your design using industry CAD tools.
  • Analysis, comparison and selection of different circuit topologies for optimal design.
  • Performance, power, area and timing optimizations of your design following requirements and other constrains established by IC So C Product architects.
  • Working with different functions like architecture, verification, FPGA design, DFT, physical implementation, silicon validation, etc. to reach quality silicon products, meeting schedule objectives.
  • Resolve problems using knowledge of several of the following areas:
    • Digital signal processing architecture and design,
    • FPGA tooling and design,
    • Clock and reset infrastructure,
    • On-chip interconnect and interfaces,
    • ARM CPU/MCU and DSP architectures,
    • Design for low power and UPF modelling,
    • Communication/control peripherals like PCIe, USB, DDR,
    • Functional safety applied to digital SOC design,
    • Requirements engineering and related tools,
    • Programming in Matlab/Simulink, scripting languages like Python or Perl.

Our team
As part of the Microprocessor and Microcontroller R&D team in our company, the product development of a large significant portion of NXP roadmap comes out of this organization and, consequently, there is remarkable visibility to the Corporate NXP Management team.
The candidate would be integrated in a team based in Hamburg, Germany and with day-to-day interactions with other design teams based locally or abroad. Our team has a track record of more than 20 years of successful product designs and innovation.

Your profile
  • Digital IP or So C design engineer with experience in all aspects of RTL design flow i.e. from specification to micro-architecture, RTL design, verification, timing analysis, area/power estimation and DFT concepts.
  • The candidate should have a strong experience in RTL design, digital signal processing, So C integration, RTL signoff tools (Synthesis/CDC/RDC/Lint).
  • Basic knowledge of compute core (ARM or RISC-V) / DSP architectures as well as ARM-Amba bus protocols would be considered a plus.
  • Proven experience with automation using several programming and scripting languages.
  • Fluent written and verbal communication in English.

Key Soft Skills
  • Proficient skills in both written and verbal communication. Can articulate well.
  • Ability to work in a collaborative and fast-paced dynamic environment.
  • Can demonstrate emotional intelligence and ability to work well as a part of local and international teams.

Education & seniority
  • M.Sc. or Ph D. Degree in Electrical Engineering or Computer Science
  • At least 3-5 years of experience on IP/Sub-system or So C digital design.

NXP is an Equal Opportunity/Affirmative Action Employer regardless of age, color, national origin, race, religion, creed, gender, sex, sexual orientation, gender identity and/or expression, marital status, status as a disabled veteran or any other characteristic protected by federal, state or local law. In addition, NXP will provide reasonable accommodations for otherwise qualified disabled individuals.

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