Israel Job Openings
Infrastructure Tools and Methodology Lead, Google Cloud
Tel Aviv-Yafo
FULL TIME
August 29, 2024
Minimum qualifications:
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Bachelor's degree in Electrical Engineering or Computer Science, or equivalent practical experience.
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10 years of experience with hardware and So C design development, including methodologies, architecture, RTL development, and CAD tool usage.
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6 years of experience in people management, developing employees, and in the engineering management cycle.
- Experience working in a dynamic multi-disciplined engineering environment across multiple regions.
Preferred qualifications:
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Master's degree in Electrical Engineering, Computer Science, a related field, or equivalent practical experience.
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Experience planning and deploying tools and flows to users.
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Experience managing a cross-site/geo organization.
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Knowledge of chip design process, verification, design or implementation.
- Excellent written and verbal communication skills.
About the job
In this role, you will lead a group of Hardware Engineers in an innovative and fast-paced environment with a focus on infrastructure for chip design. You will also lead technical projects from the concept/planning stage through execution and closure. You will help the team deliver designs that work. You will lead chip design process improvement projects in multiple areas of expertise.
Behind everything our users see online is the architecture built by the Technical Infrastructure team to keep it running. From developing and maintaining our data centers to building the next generation of Google platforms, we make Google's product portfolio possible. We're proud to be our engineers' engineers and love voiding warranties by taking things apart so we can rebuild them. We keep our networks up and running, ensuring our users have the best and fastest experience possible.
Responsibilities
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Lead chip methodology Engineers to build and maintain a silicon design environment, support multi-geographic chip development teams, and also manage and mitigate support issues for tool flows.
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Partner with Chip Project teams to define and standardize methodology across functional areas (e.g., Design, Design Verification, Physical Design).
- Manage technical evaluations of tools for possible deployment, build and maintain relationships with partners.
- Collaborate with teams across Google to identify and create opportunities for improved chip design across Google.
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Participate in design reviews and track issue resolution and engage in technical and schedule trade-off discussions.
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