Central Engineering – Optical PHY (CE-OPHY) team designs high-speed and optical transceivers for communication infrastructure in long-haul, metro and datacenter. We address the bandwidth, capacity and power issues faced by cloud computing, mega data centers that powers the social media giant platforms. Our innovative approaches have resulted in the company’s products being first to market in many of key areas, developing the most advanced chips and subsystems solutions to address the ever-increasing demand of higher data rates driven by video-on demand, gaming and other real time data streams. We are seeking talented individuals to work on solving technical challenges with the most outstanding group of collaborators in the industry. Join our team of experts and make a difference in an exciting career opportunity. As a member of a dynamic CE-OPHY team, the candidate will be responsible for designing circuits used for high-speed optical transceivers. The member will have an opportunity to work in deep submicron process and collaborate with the team on next-gen high-speed optical transceivers.

We are seeking for our Pavia, Italy site an experienced and versatile Analog Design Engineer to join our team. You will play a key role in developing multi-tens of GHz analog or DSP- based transceivers by designing analog circuits in advanced CMOS nodes (3nm and beyond).

• Analyze block specifications and select appropriate topologies.
• Design analog blocks at the transistor level.
• Supervise layout activities, provide guidelines and conduct post-layout verifications.
• Model blocks and validate models.
• Collaborate with other teams to enhance existing solutions.
• Take responsibility for designing entire analog macros or IPs.
• Participate in cross-functional meetings and interact with other functions.
• Manage both pre-silicon and post-silicon tasks through to mass production.
• Train and mentor junior designers.

• Master’s degree and/or Ph D in Electrical Engineering or related fields with 12-15 years of work experience.
• Proven experience in designing ICs from architecture definition to lab characterization and bringing them into volume production.
• Solid experience in analog design, preferably in the multi-GHz range; performing or supervising analog custom layout; using EDA CAD tools; measuring IC performance and debugging the design to correlate simulations to measurements.
• Direct project experience in at least one of the following areas a plus: Multi-Gbps electrical Ser Des or electro-optical transceivers; advance CMOS nodes, including Fin FET.
• Strong communication, presentation and documentation skills.

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