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Marvell
Analog Layout Intern - Bachelors
FULL TIME
October 16, 2024
- Primary duties include the physical layout of high speed analog-mixed signal designs, as well as DRC (Design Rule Checking) and LVS (Layout Versus Schematic) verification.
- Chance to acquire knowledge in EDA (Electronic Design Automation) tools and advanced techniques in physical layout.
- Pursuing an undergraduate degree in Computer Science, Electrical Engineering, or similar disciplines.
- Solid grasp of semiconductor technology and circuit design principles.
- Experience with tools like Cadence Virtuoso and Calibre DRC/LVS is beneficial.
- Proficient in both written and verbal English communication.
- Strong team collaboration and problem-solving abilities, coupled with a diligent and self-driven work ethic.
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