Sweden Job Openings
Swedium Global Services
ASIC Verification
Lund
August 19, 2024
We are looking for a strong ASIC verification engineer in Sweden.
Description: You will
• Take full responsibility for verification of a design, being block or sub-system
• Define and implement UVM-based test environments
• Break down Requirements and create Verification Specifications, including verification strategy for the design object and associated verification plan
• Executing Verification Strategy, by creating UVM test benches
• Develop, run and debug test cases
• Work with Coverage Closure to reach Quality goals
• Continuously improve and optimize ways of working
• Generate documentation
• Develop competence in the technical domain
To be successful in the role you must have
• A MSc degree in a technical field or the equivalent level of education
• 8+ years’ experience in verification using System Verilog and UVM.
• Experience in developing verification test plans and directed/randomized test cases
• Good team cooperation skills
• Good communication in English
• Skills in result-driven and meet expectations
Additional Requirements
• Experience using the Cadence verification suite
• Experience using v Manager and v Plans
• Experience in Formal Verification
If interested, please apply online or send your CV to career@swediumglobal.com.
- Location : Lund, Sweden
- Vacancy : 1
- Key Skills : System Verilog, UVM
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