Summary

Posted: Oct 21, 2024

Role Number:200574609

Imagine what you could do here at Apple? Together we could help craft the next generation of the world’s finest devices. New ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your career, and there's no telling what you could accomplish! We searching for a self-motivated engineer for the role of AMS Layout Engineer. You will engage with forefront technology nodes to build outstanding custom analog designs used to connect our extraordinary products to the world as well as optimizing their performance. You will join a development team that values engineering excellence, creativity and innovation. You will become a valuable member of Apple's Japan Design Centre. Dynamic, smart people and inspiring, innovative technologies are the norm here. Will you help us design next revolutionary Apple products?

Description

As a AMS Layout Engineer, you will be responsible to deliver fully-verified, clean layout, this includes the following: - Designing sophisticated layout for mixed signal and analog circuits in deep sub-micron CMOS technologies. - Reviewing and analyzing floor-plans and complex circuits with circuit designers. - Running complete set of design verification tools available on AMS blocks. - Working with circuit design team to plan/schedule work and negotiate any necessary layout tradeoffs as needed. - Interpreting LVS and DRC reports to find the fastest way to complete layout. - Exceeding engineering specifications and expectations by working closely with the design team. - Applying advanced CAD tools and mask design knowledge to deliver accurate and robust layout that meet stringent matching performance, area and power requirements.

• Experience in analog/mixed-signal layout design of deep sub-micron CMOS circuits.
• Experience implementing analog layouts and debugging DRC and LVS. Layouts may include some analog related components.
• Understanding DNW, PN junctions, and advanced process effects such as LOD, WPE etc.
• Knowledge of CADENCE and/or SIEMENS layout related tools.
Experience in interpretation of CALIBRE DRC, LVS, etc. reports.

Preferred Qualifications

• Communication skills and able to work with multi-functional teams, and capability to identify the best approach to solving problems.
• English communication with e-mail is required, verbal communication in English is considered a plus.
• Curious and motivated learner.
• Scripting skills in PERL or SKILL are a plus, but not required.