Note: By applying to this position you will have an opportunity to share your preferred working location from the following: Haifa, Israel; Tel Aviv, Israel.

Minimum qualifications:

• Bachelor's degree in Electronic Engineering or Computer Engineering, or equivalent practical experience.
• 10 years of experience working with PLLs, PCIe, Ser Des IPs.
• Experience in Ser Des design and architecture, including CDR and equalization.
• Experience working with lab equipment such as BERT, real-time scopes, Spectrum Analyzers, VNA, or protocol analyzers.
• Experience in Transmitter (Tx)/Receiver (Rx) equalization techniques and adaptation.

Preferred qualifications:

• Experience in PCIe compliance measurements using high-end equipment (e.g., Analyzer, Exerciser).
• Experience with development using pre-silicon tools (e.g., Field Programmable Gate Array (FPGA)/Emulator).
• Experience in lab equipment for PCIe testing (physical or protocol level).
• Knowledge of ARM based So C architecture (e.g., Boot flow, High-speed I/F initialization, memory allocation, etc.).

About the job

Be part of a diverse team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.As a Serializer Deserializer (SERDES0)/Peripheral Component Interconnect Express (PCIe) Silicon Characterization Engineer, you will take ownership on characterization of SERDES analog IPs provided by external vendors. Your job is to assure that the IP is meeting Google high standards. The role involves working closely with different multi-functional teams within our Silicon organization, as well as external vendors. Occasional travel might be required.
Behind everything our users see online is the architecture built by the Technical Infrastructure team to keep it running. From developing and maintaining our data centers to building the next generation of Google platforms, we make Google's product portfolio possible. We're proud to be our engineers' engineers and love voiding warranties by taking things apart so we can rebuild them. We keep our networks up and running, ensuring our users have the best and fastest experience possible.

Responsibilities

• Validate SERDES IPs, such as PCIe G6 PHYs, thoroughly.
• Write Inhouse tools/scripts to characterize the IP.
• Demonstrate the characterization, bench testing, debugging of analog/mixed signal on-chip circuitry (phase-locked loops (PLLs), Clocks, Data Converters and various I/O Interfaces).
• Develop electrical tests exercising on-chip circuitry through a combination of Joint Test Action Group (JTAG), Universal Asynchronous Receiver Transmitter (UART), Serial Peripheral Interface (SPI), and other analog interfaces.
• Draft and execute scripts to automate tests, extract results, and generate reports using database and analytical tools.

Google is proud to be an equal opportunity workplace and is an affirmative action employer. We are committed to equal employment opportunity regardless of race, color, ancestry, religion, sex, national origin, sexual orientation, age, citizenship, marital status, disability, gender identity or Veteran status. We also consider qualified applicants regardless of criminal histories, consistent with legal requirements. See also Google's EEO Policy and EEO is the Law. If you have a disability or special need that requires accommodation, please let us know by completing our Accommodations for Applicants form.