At Synopsys, we’re at the heart of the innovations that change the way we work and play. Self-driving cars. Artificial Intelligence. The cloud. 5G. The Internet of Things. These breakthroughs are ushering in the Era of Smart Everything. And we’re powering it all with the world’s most advanced technologies for chip design and software security. If you share our passion for innovation, we want to meet you.

Our EDAG Business Group (Design Technology) is at the forefront of next-generation semiconductor technology innovation. Working closely with our leading foundry partners and fabless customers, we develop design and EDA technologies for next-generation process technology. In particular, we play a key role in the development of EDA technologies that are essential to enable semiconductor breakthroughs such as Gate-All-Around (GAA) and Backside Power Delivery Network (BSPDN).

We are looking for a talented and enthusiastic new colleague:

Physical Design Engineer

This job position will closely collaborate with imec Research Center and its partners. Imec is a world-leading R&D and innovation hub for semiconductors and digital technology located in Leuven, Belgium. In this role you would work closely with the engineering teams of IMEC as well as our own teams to enhance collaboration.

You will be a member of the Foundry Core Engineering team which is responsible for DTCO and rapid (Power, Performance, Area) PPA closure on high-performance designs, using SNPS products You would be working very closely with R&D and Advanced Node Research Partners (e.g IMEC), and should be able to isolate potential issues to help enhance the algorithms to greatly improve PPA and Runtime for the customer’s specific designs.
We are seeking someone who can understand Advanced Node processes, and Foundry enablement needs and tie them to PPA closure by upgrading the capabilities of the EDA engines.

Responsibilities

• DTCO and Pathfinding on the next generation of nodes
• Working closely with the R&D and Advanced Node Research Partners on the bleeding edge of technology, and helping enhance EDA engines.
• Synthesis and P&R Pathfinding: Hands-on analysis of Digital implementation engine issues and providing quick solutions (usually TCL/Perl prototypes) to show that EDA engines can be extended to meet the Foundry/customer’s needs.
• Engaging with early new node customers and supporting the deployment of the latest technologies.

Requirements

• MSc/Ph D Degree in Electrical of Computer Science, with 1+ Experience in Digital VLSI Design, Synthesis, Place & Route, Advanced Node concepts.
• Strong understanding of Semiconductor Physics, and Fusion Compiler would be preferred.