Note: By applying to this position you will have an opportunity to share your preferred working location from the following: Tel Aviv, Israel; Haifa, Israel.

Minimum qualifications:

• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
  
• 5 years of experience with digital logic design principles, RTL design concepts, and languages such as Verilog or System Verilog.
  
• Experience with logic synthesis techniques to optimize RTL code, performance and power as well as low-power design techniques.
  
• Experience in logic design and debug with Design Verification (DV).
  
• Experience with design sign-off and quality tools (e.g., Lint, CDC, etc.).

Preferred qualifications:

• Experience in scripting languages like Python or Perl.
  
• Knowledge of high performance and low power design techniques.
  
• Knowledge of assertion-based formal verification.
  
• Knowledge of System-on-a-Chip (So C) architecture.
  
• Domain knowledge in one of these areas: PCIe, UCIe, DDR, AXI, ARM processors.
  

Google is proud to be an equal opportunity workplace and is an affirmative action employer. We are committed to equal employment opportunity regardless of race, color, ancestry, religion, sex, national origin, sexual orientation, age, citizenship, marital status, disability, gender identity or Veteran status. We also consider qualified applicants regardless of criminal histories, consistent with legal requirements. See also Google's EEO Policy and EEO is the Law. If you have a disability or special need that requires accommodation, please let us know by completing our Accommodations for Applicants form.