Austria Job Openings
semify GmbH
Design Verification Engineer
Graz
October 31, 2024
Tasks
As a Verification Engineer at semify, you will play a key role in implementing and verifying digital designs, developing FPGA-based prototypes, and directly engaging with our industry-leading clients to solve their challenges. You’ll also have the opportunity to coordinate teams of engineers, both onsite and remote, contributing to a dynamic and growing environment dedicated to making a meaningful impact.
Requirements
The ideal candidate will:
- Have a minimum of 3+ years of experience in verifying digital designs (UVM preferred)
- Possess strong knowledge of at least one HDL (Hardware Description Language), with a preference for System Verilog
- Be proficient in writing and understanding Python scripts
- Have experience with version control systems (Git preferred)
- Enjoy working as part of a distributed team
We believe in the power of international talent and cooperation. With the European Chips Act set to have a significant impact on the industry, there is a growing need for skilled professionals. By joining semify, you can actively participate in shaping the bright future of the European semiconductor landscape.
What we offer:
- Professional Development: We offer comprehensive training programs, with a focus on verification, including cutting-edge tools like Cocotb, to keep you at the forefront of industry advancements.
- Relocation Support: We actively assist with the relocation and work permit process, making it seamless for international talent to join our team.
- Skills Analysis: We offer a differentiated skills analysis program that uniquely highlights and maps your competencies, aiding in your long-term professional growth.
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